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| author | Stéphane Lesimple <speed47_github@speed47.net> | 2018-02-09 19:54:34 +0100 |
|---|---|---|
| committer | Stéphane Lesimple <speed47_github@speed47.net> | 2018-02-09 19:56:27 +0100 |
| commit | eb75e519754800fd3c3d42d6f4cb4e50ba985889 (patch) | |
| tree | a0397baaea77dda0f17ca9a8718964bb6eab8b09 | |
| parent | 253e18080795edbb6017fc3fda95e6e34e5f903b (diff) | |
| download | spectre-meltdown-checker-eb75e519754800fd3c3d42d6f4cb4e50ba985889.tar.lz spectre-meltdown-checker-eb75e519754800fd3c3d42d6f4cb4e50ba985889.tar.xz spectre-meltdown-checker-eb75e519754800fd3c3d42d6f4cb4e50ba985889.zip | |
fix(ucode): update list of blacklisted ucodes from 2018-02-08 Intel document
Removed 2 ucodes and added 2 other ones
| -rwxr-xr-x | spectre-meltdown-checker.sh | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/spectre-meltdown-checker.sh b/spectre-meltdown-checker.sh index 654f4db..4e6d98e 100755 --- a/spectre-meltdown-checker.sh +++ b/spectre-meltdown-checker.sh @@ -780,6 +780,7 @@ is_ucode_blacklisted() [ "$cpu_family" = 6 ] || return 1 # now, check each known bad microcode # source: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/x86/kernel/cpu/intel.c#n105 + # 2018-02-08 update: https://newsroom.intel.com/wp-content/uploads/sites/11/2018/02/microcode-update-guidance.pdf # model,stepping,microcode ucode_found="model $cpu_model stepping $cpu_stepping ucode $cpu_ucode" for tuple in \ @@ -789,13 +790,13 @@ is_ucode_blacklisted() $INTEL_FAM6_KABYLAKE_MOBILE,0x0A,0x84 \ $INTEL_FAM6_KABYLAKE_MOBILE,0x09,0x84 \ $INTEL_FAM6_SKYLAKE_X,0x03,0x0100013e \ + $INTEL_FAM6_SKYLAKE_X,0x04,0x0200003a \ $INTEL_FAM6_SKYLAKE_X,0x04,0x0200003c \ - $INTEL_FAM6_SKYLAKE_MOBILE,0x03,0xc2 \ - $INTEL_FAM6_SKYLAKE_DESKTOP,0x03,0xc2 \ $INTEL_FAM6_BROADWELL_CORE,0x04,0x28 \ $INTEL_FAM6_BROADWELL_GT3E,0x01,0x1b \ $INTEL_FAM6_BROADWELL_XEON_D,0x02,0x14 \ $INTEL_FAM6_BROADWELL_XEON_D,0x03,0x07000011 \ + $INTEL_FAM6_BROADWELL_X,0x01,0x0b000023 \ $INTEL_FAM6_BROADWELL_X,0x01,0x0b000025 \ $INTEL_FAM6_HASWELL_ULT,0x01,0x21 \ $INTEL_FAM6_HASWELL_GT3E,0x01,0x18 \ |